1. Field of the Invention
The present invention relates to a device for decoding various data superimposed in a vertical blanking period of a video signal.
2. Description of the Related Art
In the latest technology, there is known a method of transmitting various data such as character multiplex signal, caption signal, teletext signal and so forth by utilizing a vertical blanking period of a video signal.
In the format of such data, as shown in FIG. 9(a) for example, first a data sampling clock reference signal (hereinafter referred to as clock reference signal) CR is inserted next to a color burst CB at a predetermined horizontal line position in a vertical blanking period, and a data signal DT composed of a predetermined number of bits is inserted successively thereto. In another example of FIG. 9(b), a reference pulse RP representing the content of the data is inserted next to a color burst CB, and a data signal DT composed of a predetermined number of bits is inserted successively thereto.
The kinds of data to be superimposed and the systems thereof are listed in Table below. Here, a superimpose line signifies a line position (horizontal position) designated in a vertical blanking period. In this table, there are shown merely examples of data contents.
TABLE 1 ______________________________________ Superimpose Sampling Examples of Area Data line clock data contents ______________________________________ Japan Character 14, 15, 16, 5.7272 RGB superimpose multiplex 21, 277 MHz broadcast 278, 279, 284 Video ID 20, 283 Fsc/8 Aspect ratio data, picture display mode data, etc. U.S.A. Closed 21 503 kHz Character broad- caption cast data for deaf and dumb (Character superimpose) Line 21; 284 503 kHz Close caption, Field 2 text service, etc. Europe Teletext 7-22 6.9 MHz RGB superimpose VPS 16 6.9 MHz Video apparatus (7-22) control data such as program code data Video ID Undecided Fsc/8 Aspect ratio data, picture display mode data, etc. ______________________________________
In accordance with such various kinds of the data shown above, a television receiver or video apparatus is equipped with a data decoding device which is capable of decoding such data from the video signal.
A conventional closed caption decoder is shown in FIG. 10 as an exemplary device known in the related art, and waveforms of signals denoted therein by reference numerals (1) through (7) are shown in FIG. 11.
An input video signal (1) from a terminal 1 is supplied to both a low-pass filter 2 and a sync separator 3. The output (2 MHz) of the low-pass filter 2 is compared, in a binary circuit 4, with a predetermined slice level SL as shown in FIG. 11(a), and a binary signal (2) of FIG. 11(b) obtained therefrom is supplied to a gate circuit 5.
Meanwhile a horizontal sync signal Hs and a vertical sync signal Vs are output from the sync separator 3 and then are supplied to a line counter 6. The line counter 6 is reset by the vertical sync signal Vs and then counts the line position by counting the pulses of the horizontal sync signal Hs. The counted value is supplied to a line decoder 7, which then detects the arrival of the value at the 21st line where the caption data is superimposed. The line decoder 7 delivers to the gate circuit 5 a line signal extract pulse (3)which serves as a 21st line gate as shown in FIG. 11(c) .
The horizontal sync signal Hs is supplied also to an intraline counter/decoder 8, which then counts output clock pulses CLK of the PLL circuit 11 on the basis of the horizontal sync signal Hs and generates a reference signal extract pulse (4) (FIG. 11(d)) to serve as a gate pulse corresponding to the duration of the clock reference signal CR for the caption signal in the line. The pulse (4) is supplied to a gate circuit 9. The counter/decoder 8 further counts the output clock pulses CLK of the PLL circuit 11 on the basis of the horizontal sync signal Hs and generates a data signal extract pulse (5) (FIG. 11(e)) to serve as a gate pulse corresponding to the duration of the data signal DT for the caption signal in the line. The pulse 5 is supplied to a gate circuit 10.
The 21st-line signal of the binary signal (2) is delivered from the gate circuit 5 in response to the data signal extract pulse (3) and then is supplied to both a register 12 and the gate circuit 9. Since the reference signal extract pulse (4) is also supplied to the gate circuit 9, a 21st-line clock reference signal (6) (FIG. 11(f)) is output from the gate circuit 9 and then is supplied to the PLL circuit 11. The oscillation frequency of the PLL circuit 11 is set fixedly to 503 kHz in conformity with the closed caption signal, so that clock pulses of 503 kHz synchronized with the clock frequency signal (6) are output from the PLL circuit 11 and are supplied to the gate circuit 10. Since the data signal extract pulse (5) is also supplied to the gate circuit 10, the output of the PLL circuit 11 is delivered from the gate circuit 10 for the duration of the pulse (5) and then is supplied as a data extract clock signals (7) (FIG. 11(g)) to the register 12.
Subsequently the data supplied from the gate circuit 5 is sampled in response to the data extract clock signal (7) and is stored in the register 12, whereby the caption data signal is obtained.
And in an apparatus such as a television receiver or the like equipped with the caption decoder mentioned above, a required process relative to the caption information can be executed on the basis of the data thus stored in the register 12.
However, the above caption decoder performs its operation merely with respect to the caption signal alone. Therefore, in any apparatus equipped with the caption decoder, it is necessary to incorporate an exclusive data decoding device therein individually for selectively changing the aspect ratio in accordance with the aspect ratio information or for receiving character multiplex broadcast.
For example, a Japanese television receiver is required to incorporate a character multiplex broadcast decoder and a video ID decoder, whereas an European television receiver is required to incorporate a teletext decoder, a VSP decoder and a video ID decoder.
Furthermore, due to the differences among the data formats used in the individual areas, it is necessary to manufacture different apparatus suited for the individual areas with another disadvantage that some difficulties are unavoidable in standardizing the circuit substrates and so forth employed in the data decoding devices.
Consequently, in view of the above circumstances relative to the television receiver, video apparatus and adapter type data decoding device, there exist problems including a rise of the production cost and an increase of the circuit scale.